J-Link Lite for Cortex-M debug probe included in IAR KickStart Kit for Kinetis K70F120M

J-Link Lite for Cortex-M debug probe

Kit contents:

  • TWR-K70F120M – MK70FN1M0VMJ12: K70FN1M in a 256 MAPBGA with 120 MHz operation
  • TWR-ELEV – Two elevator modules that provide power regulation circuitry, standardized signal assignments, and act as common backplane for Read more
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Lattice starts shipping ECP4 FPGAs First Samples

LatticeECP4 Block Diagram

Lattice has begun shipping the highest density member of the next generation LatticeECP4 FPGA family to select customers.

This new family offers the richest portfolio of low cost, low power mid-range devices under 200K LUTs, with Read more

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GerbMerge – A Gerber – file merging utility

GerbMerge is a program for combining (panelizing) the CAM data from multiple printed circuit board designs into a single set of CAM files.

The purpose of doing so is to submit a single job to a board manufacturer, thereby Read more

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