Eagle

Eagle 9.2 Negative Solder Mask problem

Upgrading Eagle over 9.2,  a new strange thing happens. In the CAM settings, on every soldermask layer, appears a checked box named “Negative image”.

The results are… a borderless soldermask.

Negative option in CAM Settings

Gerbers with borderless soldermask

Normal Gerbers after removing the negative option

Eagle missing managed libraries

After a clean upgrade to Eagle 8.5.2 I couldn’t find the (new) managed libraries.

The user folder in “Documents” is fine with all the work and all the versions inside.

The answer seems to be that you have to re-import them and it makes some sense, but it would be better if it was some link to them in the Control Panel.

The fact that it is no auto-update is the best choice because you may have some file that wouldn’t need the updated library because you strangely placed something on the board.

The quick import procedure follows:

Open Library Manager > go to the Available panel > import by downloading all you need > check that all is fine in the In Use panel > close Library Manager.

Restart Eagle.

 

CC2541 SensorTag

device under test

A Bluetooth Low Energy Development Kkit for wireless sensor applications.

Useful Links:

TI SensorTag: www.ti.com/sensortag

http://www.ti.com/tool/cc2541dk-sensor

SensorTag Quick Start Guide: http://www.ti.com/litv/pdf/swru324b

SensorTag Software: http://www.ti.com/tool/sensortag-sw

CC2541 SoC: http://www.ti.com/product/cc2541

The power supply section – TPS62730: http://www.ti.com/product/tps62730

The Meandered IFA dimensions can be found on page 4 of the SWRA117D app note.

One unverified Eagle Library here:

[code]
# ioclk.com Opensource Eagle Script
# Eagle > New Library > Execute Script
# Library script
#
# EAGLE Version 6.5.0 Copyright (c) 1988-2013 CadSoft
#
Set Wire_Bend 2;
# Grid changed to ‘mm’ to avoid loss of precision!
Grid mm;
Layer   1 Top;
Layer  16 Bottom;
Layer  17 Pads;
Layer  18 Vias;
Layer  19 Unrouted;
Layer  20 Dimension;
Layer  21 tPlace;
Layer  22 bPlace;
Layer  23 tOrigins;
Layer  24 bOrigins;
Layer  25 tNames;
Layer  26 bNames;
Layer  27 tValues;
Layer  28 bValues;
Layer  29 tStop;
Layer  30 bStop;
Layer  31 tCream;
Layer  32 bCream;
Layer  33 tFinish;
Layer  34 bFinish;
Layer  35 tGlue;
Layer  36 bGlue;
Layer  37 tTest;
Layer  38 bTest;
Layer  39 tKeepout;
Layer  40 bKeepout;
Layer  41 tRestrict;
Layer  42 bRestrict;
Layer  43 vRestrict;
Layer  44 Drills;
Layer  45 Holes;
Layer  46 Milling;
Layer  47 Measures;
Layer  48 Document;
Layer  49 Reference;
Layer  51 tDocu;
Layer  52 bDocu;
Layer  91 Nets;
Layer  92 Busses;
Layer  93 Pins;
Layer  94 Symbols;
Layer  95 Names;
Layer  96 Values;
Layer  97 Info;
Layer  98 Guide;
Description ”;

Edit ‘IOCLK-TI-ANT.sym’;
Layer 94;
Change Style continuous;
Wire  0.254 (0 10.16) (15.24 10.16) (15.24 7.62) (17.78 7.62) \
(17.78 10.16) (20.32 10.16) (20.32 7.62) (22.86 7.62) \
(22.86 10.16) (25.4 10.16) (25.4 5.08);
Layer 94;
Change Size 1.27;
Change Ratio 8;
Change Align bottom left;
Change Font proportional;
Text ‘PCB Antenna’ R0 (12.7 2.54);
Pin ‘GND’ sup none middle R90 both 0 (0 5.08);
Pin ‘FEED’ in none middle R90 both 0 (5.08 5.08);
Layer 94;
Wire  0.254 (30.48 0) (30.48 15.24) (-2.54 15.24) (-2.54 0) \
(30.48 0);

Edit ‘IOCLK-TI-ANT.pac’;
Description ‘\
PCB Small Antenna \n\
– inv.F 2.4 GHz \n\
– according to TI”s SWRA117D, Application Note AN043\n\
– ioclk.com Eagle Library’;
Layer 1;
Rect R0 (0 0) (0.9 4.9);
Layer 1;
Rect R0 (0 4.9) (5 5.4);
Layer 1;
Rect R0 (2.3 0) (2.8 4.9);
Layer 1;
Rect R0 (4.5 2.26) (5 4.9);
Layer 1;
Rect R0 (5 2.26) (7 2.76);
Layer 1;
Rect R0 (7 2.26) (7.5 4.9);
Layer 1;
Rect R0 (7 4.9) (9.7 5.4);
Layer 1;
Rect R0 (9.2 2.26) (9.7 4.9);
Layer 1;
Rect R0 (9.7 2.26) (11.7 2.76);
Layer 1;
Rect R0 (11.7 2.26) (12.2 4.9);
Layer 1;
Rect R0 (11.7 4.9) (14.4 5.4);
Layer 1;
Rect R0 (13.9 0.96) (14.4 4.9);
Layer 21;
Wire  0.127 (-0.5 5.7) (14.7 5.7);
Wire  0.127 (0 0) (-0.5 0) (-0.5 5.7);
Wire  0.127 (14.7 5.7) (14.7 0) (0.1 0);
Layer 1;
Smd ‘GND’ 0.2 0.2 -0 R0 (0.4 0.1);
Layer 1;
Smd ‘FEED’ 0.2 0.2 -0 R0 (2.5 0.1);
Layer 21;
Change Size 0.6096;
Change Ratio 3;
Change Align bottom left;
Text ‘IOCLK – BLE – ANT’ R0 (3.81 1.27);
Layer 21;
Change Size 0.3048;
Change Align bottom left;
Text ‘According to SWRA117D’ R0 (3.81 0.635);
Layer 1;
Smd ‘G’ 1.27 0.635 -0 R90 (0.4 -0.57);
Layer 1;
Smd ‘F’ 1.27 0.635 -0 R90 (2.56 -0.57);

Edit ‘IOCLK-TI-ANT.dev’;
Prefix ”;
Description ‘\
PCB Small Antenna \n\
– inv.F 2.4 GHz \n\
– according to TI”s SWRA117D, Application Note AN043\n\
– ioclk.com Eagle Library’;
Value off;
Add IOCLK-TI-ANT ‘G$1’ next 0 (0 0);
Package ‘IOCLK-TI-ANT’ ”;
Technology ”;
Connect  ‘G$1.FEED’ ‘F’  ‘G$1.GND’ ‘G’;
Grid inch;

[/code]

RSS EETimes Semiconductor News
  • Tech Weapons, Walls and Shared Wells December 10, 2018
    The next big war has already started with nations using technology and global corporations as both weapons and targets--we can do better.
  • Arm Releases IoT Predictions for 2019 December 10, 2018
    IP vendor shares what it thinks will happen in Io in 2019 as well as results of a consumer survey about IoT, machine learning, artificial intelligence and 5G.
  • Mobile Networks Shutdown: a Sign of What's to Come? December 10, 2018
    An expired software certificate seems to have caused a shutdown in mobile networks in the UK and Japan last week, causing significant disruption. Is this a sign of things to come with hidden IoT devices everywhere?